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STLVDS31
High speed differential line drivers
Feature summary
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Meets or exceeds the requirements of ansi TIA/EIA-644 standard Low voltage differential signaling with typical output voltage of 350mV and a 100 load Typical output voltage rise and fall times of 750ps (400mbps) Typical propagation delay times of 1.7ns Operates from a single 3.3V supply Power dissipation 25mW typical per driver at 200MHz Driver at high impedance when disabled or with VCC = 0V Pin compatible with the AM26LS31, SN65LVD31 Low voltage TTL (LVTTL) logic input levels voltage magnitude of 247mV into a 100 load when enabled. The intended application of this device and signalling technique is for point-to-point baseband data transmission over controlled impedance media approximately 100. The transmission media may be printed circuit board traces, backplanes or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and noise coupling to the environment. The STLVDS31 is characterized for operation from -55C to 125C. .
TSSOP
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Description
The STLVDS31 is a quad differential line drivers that implements the electrical characteristics of low voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds and allows operations with a 3.3V supply rail. Any of the four current mode drivers will deliver a minimum differential output
Order code
Part number STLVDS31BTR March 2006 Temperature Range -55 to 125 C Package TSSOP16 (Tape & Reel) Rev. 5 Comments 2500 parts per reel 1/15
www.st.com 15
STLVDS31
Contents
1 2 3 4 5 6 7 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
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STLVDS31
Pin configuration
1
Figure 1.
Pin configuration
Pin connections and functional diagram
Table 1.
Pin description
Pin n 1, 7, 9, 15 2, 6, 10, 14 3, 5, 11, 13 4 12 8 16 Symbol 1A to 4A 1Y to 4Y 1Z to 4Z G G GND VCC Driver inputs Driver outputs Driver outputs Enable Enable Ground Supply voltage Name and function
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Pin configuration
STLVDS31
Figure 2.
Logic diagram and logic symbol
Table 2.
Truth table for receiver
VID = VA - V B VID 100mV -100mV < VID < 100mV VID -100mV OPEN R H ? L H
Table 3.
Truth table
Input A H L H L X OPEN OPEN G H H X X L H X Enables G X X L L H X L Y H L H L Z L L Outputs Z L H L H Z H H
L=Low level, H=High Level, X=Don't care, Z= High Impedance
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STLVDS31
Maximum ratings
2
Table 4.
Maximum ratings
Absolute maximum ratings
Parameter Supply Voltage (1) DC Input Voltage Storage Temperature Range Value -0.5 to 4.6 -0.5 to (VCC + 0.5) -65 to +150 Unit V V C
Symbol VCC VI Tstg
1. All voltages except differential I/O bus voltage, are with respect to the network ground terminal.
Note:
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. Recommended operating conditions
Parameter Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage Operating Temperature Range -40 Min. 3.0 2.0 0.8 85 Typ. 3.3 Max. 3.6 Unit V V V C
Table 5.
Symbol VCC VIH VILI TA
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Electrical characteristics
STLVDS31
3
Table 6.
Electrical characteristics
Electrical characteristics (Over recommended operating conditions unless otherwise noted. All typical values are at TA = 25C, and VCC = 3.3V).
Parameter Differential Output Voltage Change in Differential Output Voltage Between Logic State RL = 100, Fig. 2 Test Min. 247 -50 Typ. 350 Max. 454 50 Unit mV mV
Symbol VOD VOD
Change in Steady-state VOC(SS) Common Mode Output Voltage Between Logic State VOC(SS) VOC(PP) Steady-state Common Mode Output Voltage Peak to Peak Common mode Output Voltage
Fig. 3
1.125
1.2
1.375
V
Fig. 3
-50 80
50 150 20 35 1 20 10 -24 12 1 20 1 3
mV mV mA mA mA A A mA mA A A A pF
VIN = 0.8V or 2V, Enabled, No Load ICC Supply Current VIN = 0.8V or 2V, Enabled, RL = 100 VIN = 0 or VCC, Disabled IIH IIL ISC IOZ ICS IOFF CIN High Level Input Current Low Level Input Current Short Circuit Output Current VIH = 2V VIL = 0.8V VO(Y) or VO(Z) = 0V VOD = 0 High Impedance Output Current VO = 0 or 2.4V Cold Spare Leakage Current Power OFF Output Current Input Capacitance VI = 3.6V, VDD = 0V VCC = 0VO = 2.4V
11.5 25 0.3 4 0.6 6.1
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STLVDS31 Table 7.
Electrical characteristics Switching characteristics (Over recommended operating conditions unless otherwise noted. All typical values are at TA = 25C, and VCC = 3.3V).
Parameter Test Min. 0.5 1 0.4 0.4 Typ. 1.4 1.7 0.5 0.5 0.3 0 5.4 2.5 Fig. 4 8.1 7.3 Max. 2 2.5 0.6 0.6 0.6 0.3 15 15 15 15 Unit ns ns ns ns ns ns ns ns ns ns
Symbol tPLH tPHL tr tf tsk(P) tsk(O) tPZH tPZL tPHZ tPLZ
Propagation Delay Time, Low to High Output Propagation Delay Time, High to Low Output Differential Output Signal Rise Time Differential Output Signal Fall Time Pulse Skew (|tTHL = tTLH|) Channel to Channel Output Skew
(1)
RL = 100, CL = 10pF Fig. 2
Propagation Delay Time, High Impedance to High Level Output Propagation Delay Time, High Impedance to Low Level Output Propagation Delay Time, High Level to High Impedance Output Propagation Delay Time, Low Level to High Impedance Output
1. tsk(O) is the maximum delay time difference between drivers on the same device.
RS-232 IN to TTL-CMOS OUT (from 50% to 50%).
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Typical characteristics
STLVDS31
4
Figure 3.
Typical characteristics
Voltage and current definitions
Figure 4.
Test circuit, timing and voltage definitions for differential output signal
Note A: All input pulse are supplied by a generator having the following characteristics: tr or tf 1ns, pulse repetition rate (PRR) = 50Mpps, pulse width = 10 0.2ns. Note B: CL includes instrumentation and fixture capacitance within 6mm of the D.U.T.
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STLVDS31
Typical characteristics
Figure 5.
Test circuit and definitions for the driver common mode output voltage
Note A: All input pulse are supplied by a generator having the following characteristics: tr or tf 1ns, pulse repetition rate (PRR) = 50Mpps, pulse width = 10 0.2ns. Note B: CL includes instrumentation and fixture capacitance within 6mm of the D.U.T Note C: The measurement of VOC(PP) is made on test equipment with a -3dB bandwidth of at least 300MHz.
Figure 6.
Enable and disable time test circuit and waveform
Note A: All input pulse are supplied by a generator having the following characteristics: tr or tf 1ns, pulse repetition rate (PRR) = 0.5Mpps, pulse width = 500 10ms. Note B: CL includes instrumentation and fixture capacitance within 6mm of the D.U.T.
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Typical performance characteristics
STLVDS31
5
Typical performance characteristics
(Unless otherwise specified TJ = 25C)
Figure 7.
Supply Current vs Temperature
Figure 8.
Supply Current vs Temperature
Figure 9.
Propagation Delay Enable to Output Figure 10. Propagation Delay time
Figure 11. Differential Output Signal
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STLVDS31
Package mechanical data
6
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
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Package mechanical data
STLVDS31
TSSOP16 MECHANICAL DATA
mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8 0.75 0 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0079 0.201 0.260 0.176 inch
A
A2 A1 b e K c L E
D
E1
PIN 1 IDENTIFICATION
1
0080338D
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STLVDS31
Package mechanical data
Tape & Reel TSSOP16 MECHANICAL DATA
mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.7 5.3 1.6 3.9 7.9 12.8 20.2 60 22.4 6.9 5.5 1.8 4.1 8.1 0.264 0.209 0.063 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.272 0.217 0.071 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch
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Revision history
STLVDS31
7
Table 8.
Date
Revision history
Revision history
Revision 5 Changes Order codes has been updated and new template.
28-Mar-2006
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STLVDS31
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